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VS1000b
VS1000
VS1000 - Ogg Vorbis Player IC with USB and NAND FLASH Interface
Hardware Features
* Low-power operation * Single input voltage: Internal voltage regulation for analog, digital, and I/O power * Operates with a single 12 MHz clock * Internal PLL clock multiplier * Power button pin, software-controlled power-off * USB Full Speed hardware * NAND FLASH interface with ECC * I/O for user interface * High-quality on-chip stereo DAC with no phase error between channels * Stereo earphone driver capable of driving a 30 load * Lead-free RoHS-compliant package (Green)
Description
VS1000 is a single-chip Ogg Vorbis (license-free audio codec) player. VS1000 contains a high-performance low-power DSP core VS DSP4 , NAND FLASH interface, Full Speed USB port, general purpose I/O pins, SPI, UART, as well as a highquality variable-sample-rate stereo DAC, and an earphone amplifier and a common voltage buffer. VS1000 firmware implements a default player that reads and plays files from the NAND FLASH. The player can be customized or replaced by using boot from NAND FLASH. When connected to USB, the firmware implements USB Mass Storage Device protocol or acts as an Audio Device, providing a single-chip USB headphone application. EarSpeaker spatial processing provides more natural sound in headphone listening conditions. It widens the stereo image and positions the sound sources outside the listener's head. SPI EEPROM can be used to load code in applications that do not use NAND FLASH.
Firmware Features
* Implements USB Mass Storage Device and Audio Device * NAND FLASH handling with error correction, block remapping, and wear levelling * Default player application in firmware - Decodes Ogg Vorbis, sound level normalization using Replay Gain - Pause / Play - Volume control - Next / Previous Song - Rewind and Fast Forward - Random Play - EarSpeaker Spatial Processing * Bass and treble controls for customized player * NAND FLASH boot for customized player * SPI FLASH boot for special applications * UART for debugging and special applications
Version 1.0,
2007-09-11
1
VLSI
Solution
y
VS1000b
VS1000
CONTENTS
Contents
1 Disclaimer 4
2
Definitions
4
3
Characteristics & Specifications 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Characteristics of Audio Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Characteristics of Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Characteristics of VHIGH voltage monitor . . . . . . . . . . . . . . . . . . . . Analog Characteristics of CVDD voltage monitor . . . . . . . . . . . . . . . . . . . . . Analog Characteristics of USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 4 5 5 6 6 6 7 7 7
4
Packages and Pin Descriptions 4.1 4.2 Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LQFP-48 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8 8 9
5
Example Schematic
11
6
VS1000 Functional Blocks 6.1 6.2 6.3 Regulator Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12 12 13 14
Version 1.0,
2007-09-11
2
VLSI
Solution
y
VS1000b
VS1000
LIST OF FIGURES
7
Firmware Operation 7.1 7.2 7.3 7.4 SPI Boot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NAND FLASH Probe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UART Boot/Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Default Firmware Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.4.1 7.4.2 7.5 USB Mass Storage and Audio Device . . . . . . . . . . . . . . . . . . . . . . . Default Player Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15 15 16 16 17 17 17 19 19 20
Supported Audio Codecs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5.1 Supported Ogg Vorbis Formats . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.6
EarSpeaker Spatial Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8
VS1000 Errata
21
9
Document Version Changes
22
10 Contact Information
23
List of Figures
1 2 3 Pin Configuration, LQFP-48. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VS1000 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EarSpeaker externalized sound sources vs. normal inside-the-head sound . . . . . . . . . 8 12 20
Version 1.0,
2007-09-11
3
VLSI
Solution
y
VS1000b
VS1000
1. DISCLAIMER
1
Disclaimer
All properties and figures are subject to change.
2
Definitions
B Byte, 8 bits. b Bit. Ki "Kibi" = 210 = 1024 (IEC 60027-2). Mi "Mebi" = 220 = 1048576 (IEC 60027-2). VS DSP VLSI Solution's DSP core. W Word. In VS DSP, instruction words are 32-bit and data words are 16-bit wide.
3
Characteristics & Specifications
3.1 Absolute Maximum Ratings
Parameter Regulator input voltage Analog Positive Supply Digital Positive Supply I/O Positive Supply Voltage at Any Digital Input Total Injected Current on Pins Operating Temperature Storage Temperature
1 2
Symbol VHIGH AVDD CVDD IOVDD
Min -0.3 -0.3 -0.3 -0.3 -0.3 -40 -65
Max 5.25 3.6 2.7 3.6 IOVDD+0.31 200 2 +85 +150
Unit V V V V V mA C C
Must not exceed 3.6 V Latch-up limit
Version 1.0,
2007-09-11
4
VLSI
Solution
y
VS1000b3. CHARACTERISTICS & SPECIFICATIONS
VS1000
3.2
Recommended Operating Conditions
Symbol AGND DGND VHIGH AVDD CVDD IOVDD XTALI CLKU CLKI Min -40 AVDD+0.3 2.75 2.2 1.8 12 48 12 40 Typ 0.0 4.0 2.8 2.3 2.8 125 Max +85 5.25 3.6 2.65 3.6 13 48 48 60 Unit C V V V V V MHz MHz MHz %
Parameter Operating temperature Analog and digital ground 1 Regulator input voltage2 Analog positive supply3 Digital positive supply 3 I/O positive supply3 Input clock frequency4 Internal clock frequency, USB connected Internal clock frequency, USB disconnected Master clock duty cycle
1 2
50
Must be connected together as close the device as possible for latch-up immunity. 4.0 V is required for compliant USB level. 3 Regulator output of the device. 4 The maximum sample rate that can be played with correct speed is XTALI/256. With 12 MHz XTALI sample rates over 46875 Hz are played at 46875 Hz. 5 To be able to use USB, XTALI must be 12 MHz.
3.3
Analog Characteristics of Audio Outputs
Unless otherwise noted: AVDD=2.8V, CVDD=2.4V, IOVDD=2.8V, TA=-40..+85 C, XTALI=12 MHz,
Internal Clock Multiplier 3.0x. DAC tested with full-scale output sinewave, measurement bandwidth 20..20000 Hz, analog output load: LEFT to CBUF 30 , RIGHT to CBUF 30 . Parameter DAC Resolution Dynamic range (DAC unmuted, A-weighted, min gain) S/N ratio (full scale signal, no load) S/N ratio (full scale signal, 30 ohm load) Total harmonic distortion, max level, no load Total harmonic distortion, max level, 30 ohm load Crosstalk (L/R to R/L), 30 ohm load, without CBUF 1 Crosstalk (L/R to R/L), 30 ohm load, with CBUF Gain mismatch (L/R to R/L) Frequency response Full scale output voltage Deviation from linear phase Analog output load resistance Analog output load capacitance DC level (CBUF, LEFT, RIGHT) CBUF disconnect current (short-circuit protection)
1 2
Symbol IDR SNR SNRL THD THDL XTALK1 XTALK2 GERR AERR LEVEL PH AOLR AOLC
Min
75
Typ 18 96 92 90 0.01 0.1 75 54
Max
0.3
-0.5 -0.05 450
530 0 302
0.5 0.05 600 5 1003 1.3 200
Unit bits dB dB dB % % dB dB dB dB mVrms
1.1 130
pF V mA
Loaded from Left/Right pin to analog ground via 100 F capacitors. AOLR may be lower than Typical, but distortion performance may be compromised. Also, there is a maximum current that the internal regulators can provide. 3 CBUF must have external 10 + 47 nF load, LEFT and RIGHT must have external 20 + 10 nF load for optimum stability and ESD tolerance.
Version 1.0,
2007-09-11
5
VLSI
Solution
y
VS1000b3. CHARACTERISTICS & SPECIFICATIONS
VS1000
3.4
Analog Characteristics of Regulators
Symbol Min 1.7 50 Typ Max 3.6 70 Unit V mV V V mV/mA mV/V mA V mV V V mA mV/mA mV/V V mV V V mA mV/mA mV/V
Parameter IOVDD Recommended voltage setting range Voltage setting step size Default setting, reset mode 1 Default setting, active mode 2 Load regulation Line regulation from VHIGH Continuous current CVDD Recommended voltage setting range Voltage setting step size Default setting, reset mode 1 Default setting, active mode 2 Continuous current Load regulation Line regulation from VHIGH AVDD Recommended voltage setting range Voltage setting step size Default setting, reset mode 1 Default setting, active mode 2 Continuous current Load regulation Line regulation from VHIGH
1 2
60 1.8 1.8/3.63 4.0 2.0 304
40 2.6 55
1.8 35
48 1.8 2.2 304 2.0 2.0
35
2.6 35
46 2.5 2.7 304 1.5 2.0
3.6 55
70
Device enters reset mode when XRESET pin is pulled low. Device enters active mode when XRESET pin is pulled high after reset mode. Regulator settings can be modified when booted from external memory (see section 7). 3 Depends on GPIO0 7 pin status in boot (see section 7). 4 Device is tested with a 30 mA load.
3.5 Analog Characteristics of VHIGH voltage monitor
Parameter Trigger voltage Hysteresis Symbol AMON Min Typ 1.07xAVDD 50 Max Unit V mV
3.6
Analog Characteristics of CVDD voltage monitor
Symbol CMON Min 1.40 Typ 1.53 2 Max Unit V mV
Parameter Trigger voltage Hysteresis
Version 1.0,
2007-09-11
6
VLSI
Solution
y
VS1000b3. CHARACTERISTICS & SPECIFICATIONS
VS1000
3.7
Analog Characteristics of USB
Symbol Min 0.065 0.171xAVDD 0.300xAVDD AVDD-0.165 0.650xAVDD 0 2.7 0.7xAVDD -0.2 0.8 200 -2.0 Typ Max 0.102 0.270xAVDD AVDD AVDD-0.065 0.829xAVDD 0.700xAVDD 0.943xAVDD AVDD+0.3 0.3xAVDD 2.5 2.0 Unit V V V V V V V V V V mV A
Parameter Drive low level, 2.32 mA load Drive low level, 6.1xAVDD mA load Drive low level, 10.71xAVDD mA load Drive high level, -2.32 mA load Drive high level, -6.1xAVDD mA load Drive high level, -10.71xAVDD mA load USBP level, with 15 k pull-down High-Level input voltage (single-ended) Low-Level input voltage (single-ended) Differential input common voltage, AVDD3.3V Differential input signal level, AVDD3.3V Input leakage current
3.8
Power Consumption
Max 55 25 48 Unit mA mA mA A A mW mW mW
Parameter Symbol Min Typ Current Consumption of AVDD, no signal 3.4 Current Consumption of AVDD, sine test, CBUF + 30 load 33 Current Consumption of CVDD, sine test 3.0x clock 13 Current Consumption of USB suspend mode 1 650 Current Consumption, Reset @ 25 C 24 Example application (see Section 5) IOVDD=3.3V AVDD=2.8V CVDD=2.5V Total Power, play mode, CBUF + 30 load 120 Example application (see Section 5) IOVDD=2.7V AVDD=2.6V CVDD=2.2V Total Power, pause mode 10 Total Power, play mode, CBUF + 30 load 80
1
Requires user code support
3.9
Digital Characteristics
Symbol Min 0.7xIOVDD -0.2 0.7xIOVDD 0.7xIOVDD -1.0 0.3xIOVDD 1.0 50 Typ Max IOVDD+0.3 0.3xIOVDD 0.3xIOVDD Unit V V V V V V A ns
Parameter High-Level Input Voltage Low-Level Input Voltage High-Level Output Voltage, -1.0 mA load 1 Low-Level Output Voltage, 1.0 mA load 1 XTALO high-level output voltage, -0.1 mA load XTALO low-level output voltage, 0.1 mA load Input leakage current Rise time of all output pins, load = 30 pF 1
1
Pins GPIO0 [14:0], GPIO1 [5:0].
Version 1.0,
2007-09-11
7
VLSI
Solution
y
VS1000b
VS1000
4. PACKAGES AND PIN DESCRIPTIONS
4
4.1
Packages and Pin Descriptions
Packages
LPQFP-48 is lead (Pb) free and RoHS-compliant package. RoHS is a short name of Directive 2002/95/EC on the restriction of the use of certain hazardous substances in electrical and electronic equipment.
48
1
Figure 1: Pin Configuration, LQFP-48.
LQFP-48 package dimensions are at http://www.vlsi.fi/ .
Version 1.0,
2007-09-11
8
VLSI
Solution
y
VS1000b
VS1000
4. PACKAGES AND PIN DESCRIPTIONS
4.2
LQFP-48 Pin Descriptions
LQFP Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin Type DI DIO DIO DIO DIO DGND IOPWR DI DIO DIO DIO DIO DIO DIO DIO DIO DIO DGND IOPWR DIO DIO DIO DIO DIO DIO DIO DIO AI AO IOPWR DGND CPWR PWR APWR AIO AIO AIO APWR APWR AO APWR APWR AO APWR AIO APWR AO APWR Function Active low asynchronous reset, schmitt-trigger input Nand-flash IO0 / General-purpose IO Port 0, bit 0 Nand-flash IO1 / General-purpose IO Port 0, bit 1 Nand-flash IO2 / General-purpose IO Port 0, bit 2 Nand-flash IO3 / General-purpose IO Port 0, bit 3 Core & I/O ground I/O power supply Test mode input (active high), connect to DGND Nand-flash IO4 / General-purpose IO Port 0, bit 4 Nand-flash IO5 / General-purpose IO Port 0, bit 5 Nand-flash IO6 / General-purpose IO Port 0, bit 6 Nand-flash IO7 / General-purpose IO Port 0, bit 7 Nand-flash READY / General-purpose IO Port 0, bit 8 Nand-flash RD / General-purpose IO Port 0, bit 9 Nand-flash CE / General-purpose IO Port 0, bit 10 Nand-flash CLE / General-purpose IO Port 0, bit 12 Nand-flash ALE / General-purpose IO Port 0, bit 13 Core & I/O ground I/O power supply Nand-flash WR / General-purpose IO Port 0, bit 11 General-purpose IO Port 0, bit 14 SPI XCS / General-Purpose I/O Port 1, bit 0 SPI CLK / General-Purpose I/O Port 1, bit 1 SPI MISO / General-Purpose I/O Port 1, bit 2 SPI MOSI / General-Purpose I/O Port 1, bit 3 UART TX / General-Purpose I/O Port 1, bit 4 UART RX / General-Purpose I/O Port 1, bit 5 Crystal input Crystal output I/O power supply, Regulator output Core & I/O ground Core power supply, Regulator output Power supply, Regulator input Analog power supply, Regulator output USB differential + in / out, controllable 1.5k pull-up USB differential - in / out Power button for Regulator startup (and Power Key) Analog ground Analog power supply Right channel output Analog ground Analog ground Common voltage buffer for headphones Analog power supply Filtering capacitance for reference Analog power supply Left channel output Analog ground
Pin Name XRESET NFDIO0 / GPIO0 0 NFDIO1 / GPIO0 1 NFDIO2 / GPIO0 2 NFDIO3 / GPIO0 3 DGND0 IOVDD1 TEST NFDIO4 / GPIO0 4 NFDIO5 / GPIO0 5 NFDIO6 / GPIO0 6 NFDIO7 / GPIO0 7 NFRDY / GPIO0 8 NFRD / GPIO0 9 NFCE / GPIO0 10 NFCLE / GPIO0 12 NFALE / GPIO0 13 DGND1 IOVDD2 NFWR / GPIO0 11 CS2 / GPIO0 14 XCS / GPIO1 0 SCLK / GPIO1 1 SI / GPIO1 2 SO / GPIO1 3 TX / GPIO1 4 RX / GPIO1 5 XTALI XTALO IOVDD DGND2 CVDD VHIGH AVDD USBP USBN PWRBTN AGND0 AVDD1 RIGHT AGND1 AGND2 CBUF AVDD2 RCAP AVDD3 LEFT AGND3
Version 1.0,
2007-09-11
9
VLSI
Solution
y
VS1000b
VS1000
4. PACKAGES AND PIN DESCRIPTIONS
Pin types: Type DI DO DIO AI AO Description Digital input, CMOS Input Pad Digital output, CMOS Input Pad Digital input/output Analog input Analog output Type AIO APWR DGND CPWR IOPWR Description Analog input/output Analog power supply pin Core or I/O ground pin Core power supply pin I/O power supply pin
Version 1.0,
2007-09-11
10
VLSI
Solution
y
VS1000b
VS1000
5. EXAMPLE SCHEMATIC
5
Example Schematic
Version 1.0,
2007-09-11
11
VLSI
Solution
y
VS1000b
VS1000
6. VS1000 FUNCTIONAL BLOCKS
6
VS1000 Functional Blocks
LEFT RIGHT CBUF RCAP VHIGH PWRBTN
Reference Stereo Earphone Driver Common Voltage Driver IOVDD
AVDD1 AVDD2 AVDD3
Regulator
Stereo DAC
Voltage Monitor
Regulator
AVDD
Regulator USBP USPN
CVDD
USB
reset
<1.6V
XCS/GPIO1[0] SCLK/GPIO1[1] SI/GPIO1[2] SO/GPIO1[3]
Serial Data/ Control Interface VSDSP4 processor UART
X RAM
X ROM
RX/GPIO1[5] TX/GPIO1[4] XTALO XTALI Data/ GPIO0[0...7] Control/ GPIO0[8...14]
Y RAM
Clock
Y ROM
NAND Flash Interface/ General IO
I RAM
I ROM
TEST
XRESET
IOVDD1 IOVDD2
Figure 2: VS1000 Block Diagram
6.1 Regulator Section
The VHIGH pin in the regulator section is used as a common main power supply for voltage regulation. This input is connected to three internal regulators, which are activated when the PWRBTN pin is set high for about one millisecond, so that AVDD starts to rise and reaches about 1.5 V. After the PWRBTN has given this initial start current, the regulators reach their default voltages even if the PWRBTN is released. VHIGH must be sufficiently (about 0.3 V) above the highest regulated power (normally AVDD) so that regulation can be properly performed. The PWRBTN state can also be read by software, so it can be used as one of the user interface buttons. A power-on reset monitors the core voltage and asserts reset if CVDD drops below the CMON level. It is also possible to force a reset by keeping PWRBTN pressed for longer than approximately 5.6 seconds. A watchdog counter and the XRESET pin can also generate a reset for the device. Resets do not cause the regulators to shut down, but they restore the default regulator voltages. After boot the firmware and user software can change the voltages. Return to power-off is possible only with active software control (VSDSP writes the regulator shutdown bit), or when VHIGH voltage is removed for a sufficiently long time. In the default firmware player the power button has to be pressed for 2 seconds to make the software powerdown the system and turn the regulators off.
Version 1.0,
2007-09-11
12
VLSI
Solution
y
VS1000b
VS1000
6. VS1000 FUNCTIONAL BLOCKS
6.2
Digital Section
Two of the regulators provide power supply for the digital section. IOVDD is used for the level-shifters of the digital I/O and crystal oscillator. The IOVDD regulator output must be connected to IOVDD1 and IOVDD2 input pins, because they are not connected internally. Proper bypass capacitors should also be used. The firmware uses GPIO0 7 to select I/O voltage level. After reset the I/O voltage is 1.8 V. If GPIO0 7 has a pull-down resistor, 1.8 V I/O voltage is used. If GPIO0 7 has a pull-up resistor, 3.3 V I/O voltage is used. All other digital is powered from core voltage (CVDD). The core voltage is internally connected, and the CVDD pin should have a proper bypass capacitors.
Clock
The crystal amplifier uses a crystal connected to XTALI and XTALO. An external logic-level input clock can also be used. When VS1000 is used with USB, 12 MHz input clock must be used. An internal phase-locked loop (PLL) generates the internal clock by multiplying the input clock by 1.0x, 1.5x, . . . , 4.0x. When USB is connected, the clock is 4.0x12 MHz = 48 MHz. When the player is active, the clock will be automatically changed according to the requirements of the song being played. XRESET disables the clock buffer and puts the digital section into powerdown mode.
VSDSP4
VSDSP4 is VLSI Solution's proprietary digital signal processor with a 32-bit instruction word, two 16-bit data buses, and both 16-bit and 32/40-bit arithmetic. IROM, XROM, and YROM contain the firmware, including the default player application. Most of the instruction RAM and some of the X and Y data RAM's can be used to customize and extend the functionality of the player.
UART
An asynchronous serial port is used for debugging and special applications. The default speed is 115200 bps. RX and TX pins can also be used for general-purpose I/O when the UART is not required.
SPI
A synchronous serial port peripheral is used for SPIEEPROM boot, and can be used to access other SPI peripherals (for example LCD or SED) by using another chip select. The SPI is only used for boot if the XCS pin has a high level after reset (pull-up resistor attached). These pins can also be used for general-purpose I/O when the SPI is not required. The default player uses SI and SO for LED outputs.
Version 1.0,
2007-09-11
13
VLSI
Solution
y
VS1000b
VS1000
6. VS1000 FUNCTIONAL BLOCKS
NAND FLASH Interface
The NAND FLASH peripheral calculates a simple error-correcting code (ECC), and automates some of the communication with a NAND FLASH chip. The firmware uses the peripheral to access both small-page (512+16 B pages) and large-page (2048+64 B pages) NAND FLASH chips. The first sector in the FLASH tells the firmware how it should be accessed. The NAND FLASH interface pins can also be used as general-purpose I/O. The default firmware uses GPIO0 [4:0] for keys, and GPIO0 [7:6] for other purposes. Pull-up and pull-down resistors must be used for these connections so that the data transfer to and from the NAND FLASH isn't disturbed when keys are pressed.
USB
The USB peripheral handles USB 1.1 Full Speed harware protocol. Low speed communication is not supported, but is correctly ignored. The USBP pin has a software-controllable 1.5k pull-up. A control endpoint (1 IN and 1 OUT) and upto 6 other endpoints (3 IN and 3 OUT) can be used simultaneously. Bulk, interrupt, and isochronous transfer modes are selectable for each endpoint. USB receive from USB host to device (OUT) uses a 2 KiB buffer, thus allowing very high transfer speeds. USB transmit from device to USB host (IN) also uses a 2 KiB buffer and allows all IN endpoints to be ready to transmit simultaneously. Double-buffering is also possible, but not usually required. The firmware uses the USB peripheral to implement both USB Mass Storage Device and USB Audio Device. Which device is activated depends on the state of GPIO0 6 when the USB connection is detected. If GPIO0 6 has a pull-up resistor, VS1000 appears as an USB Audio Device. If GPIO0 6 has a pull-down resistor, VS1000 appears as an USB Mass Storage Device.
6.3 Analog Section
The third regulator provides power for the analog section. The analog section consists of digital to analog converters and earphone driver. This includes a buffered common voltage generator (CBUF, around 1.2 V) that can be used as a virtual ground for headphones. The AVDD regulator output pin must be connected to AVDD1..AVDD3 pins with proper bypass capacitors, because they are not connected internally. The USB pins use the internal AVDD voltage, and the firmware configures AVDD to 3.6 V when USB is attached. Low AVDD voltage can be monitored by software. Currently the firmware does not take advantage of this feature. CBUF contains a short-circuit protection. It disconnects the CBUF driver if pin is shorted to ground. In practise this only happens with external power regulation, because there is a limit to how much power the internal regulators can provide.
Version 1.0,
2007-09-11
14
VLSI
Solution
y
VS1000b
VS1000
7. FIRMWARE OPERATION
7
Firmware Operation
The firmware uses the following pins (see the example schematics in Section 5): Pin PWRBTN GPIO0 0 GPIO0 1 GPIO0 2 GPIO0 3 GPIO0 4 GPIO0 6 GPIO0 7 NFCE XCS SI SO USBN USBP Description High level starts regulator, is also read as the Power button Key. external 1 M pull-down resistor, Key 1 connects a 100 k pull-up resistor external 1 M pull-down resistor, Key 2 connects a 100 k pull-up resistor external 1 M pull-down resistor, Key 3 connects a 100 k pull-up resistor external 1 M pull-down resistor, Key 4 connects a 100 k pull-up resistor external 1 M pull-down resistor, Key 5 connects a 100 k pull-up resistor external pull-down resistor for USB Mass Storage Device, pull-up for USB Audio Device external pull-down resistor for 1.8 V I/O voltage, pull-up resistor for 3.3 V I/O voltage external pull-up resistor for normal operation, pull-down to use RAM disk for UMS Device external pull-up to enable SPI EEPROM boot Power LED control during firmware operation Feature LED control during firmware operation external 1 M pull-up external 1 M pull-up
Boot order:
Stage Power on Reset UART Boot SPI EEPROM Boot NAND FLASH probed Default firmware Description Power button (PWRBTN) pressed when VHIGH has enough voltage Power-on reset, XRESET, or watchdog reset causes software restart Almost immediately after power-on UART can be used to enter emulator mode. If XCS is high, SPI Boot is tried. If NFCE is high, NAND FLASH is checked. The firmware in ROM takes control.
7.1
SPI Boot
The first boot method is SPI EEPROM. If GPIO1 0 is low after reset, SPI boot is skipped. If GPIO1 0 is high, it is assumed to have a pull-up resistor and SPI boot is tried. First the first four bytes of the SPI EEPROM are read using 16-bit address. If the bytes are "VLSI", a 16-bit EEPROM is assumed and the boot continues. If the last 3 bytes are read as "VLS", a 24-bit EEPROM is assumed and boot continues in 24-bit mode. Both 16-bit and 24-bit EEPROM should have the "VLSI" string starting at address 0, and the rest of the boot data starting at address 4. If no identifier is found, SPI EEPROM boot is skipped. Boot records are read from EEPROM until an execute record is reached. Unknown records are skipped using the data length field. Byte 0 1,2 3, 4 5.. Description type 0=I-mem 1=X-mem 2=Y-mem 3=execute data len lo, hi - data length in bytes address lo, hi - record address data*
Version 1.0,
2007-09-11
15
VLSI
Solution
y
VS1000b
VS1000
7. FIRMWARE OPERATION
7.2
NAND FLASH Probe
If NAND FLASH chip select (NFCE) is high, a NAND FLASH is assumed to be present and the first sector is read. The access methods (nandTypes 0..5) are tried in order to find the "VLSI" identification. If the first bytes are "VLSI", a valid boot sector is assumed. This sector gives the necessary information about the NAND FLASH so that it can be accessed in the right way. Byte 0,1,2,3 4,5 6 7 8,9 10,11 12,13,14,15 16...511 NandType 0 1 2 3 4 5 Value 0x56 0x4c 0x53 0x49 0x00 0x03 0x08 0x13 0x00 0x46 0x00 0x01 0x42 0x6f 0x4f 0x74 Description 'V' 'L' 'S' 'I' - Identification nandType (0x0003 = large-page with 3-byte block address) blockSizeBits (28 512 = 128 KiB per block) flashSizeBits (219 512 = 256 MiB flash) nandWaitNs - NAND FLASH access time in ns number of extra blocks for boot (example: 0x0001) 'B' 'o' 'O' 't' - Optional boot ident code
Description 512+16 B small-page flash with 2-byte block address (<= 32 MB) 2048+64 B large-page flash with 2-byte block address (<= 128 MB) 512+16 B small-page flash with 3-byte block address (> 32 MB <= 8 GB) 2048+64 B large-page flash with 3-byte block address (> 128 MB <= 32 GB) 512+16 B small-page flash with 4-byte block address (> 8 GB) 2048+64 B large-page flash with 4-byte block address (> 32 GB)
If bytes 12-15 contain "BoOt", the value in bytes 10 and 11 determines how many sectors are read from NANDflash. Value 1 means two 512-byte sectors are read, value 0 means only the first block is needed. After the data is read into memory, the boot records in this data are processed, transferring code and data sections into the right places in memory and possibly executed. If an unknown boot record is encountered, the booting is stopped and control returns to the firmware code. Word 0 1 2 3.. Description type 0x8000=I-mem 0x8001=X-mem 0x8002=Y-mem 0x8003=execute data length in words -1 - 0 = 1 word, 1 = 2 words, etc. address - record address data
Note: In VS1000a you can not have Y-memory records. Note: In VS1000b you need one filler word after each Y-memory record. If NFCE is low during boot, or an uninitialized NAND FLASH is connected, the NAND FLASH type is set to 0xffff, and a RAM disk is initialized when USB is attached. In this mode you can drop a boot file named VS1000 B.RUN into the disk and it will be run when the USB is disconnected. This way you can easily program a player that has an uninitialized NAND FLASH or SPI EEPROM.
7.3 UART Boot/Monitor
When byte 0xef is sent to RX at 115200 bps, the firmware enters monitor mode and communicates with vs3emu. Memory contents can be displayed, executables can be loaded and run, or the firmware code can be restarted or continued. The UART is also a convenient way to program the NAND FLASH boot sector(s) or the SPI EEPROM.
Version 1.0,
2007-09-11
16
VLSI
Solution
y
VS1000b
VS1000
7. FIRMWARE OPERATION
7.4
7.4.1
Default Firmware Features
USB Mass Storage and Audio Device
When USB cable insertion is detected by the firmware, playing of the current file is stopped and USB handling code is started. The internal clock is configured to 4.0x 12 MHz = 48 MHz, the analog power is configured to 3.6 V, the USB peripheral is initialized, and the USB pull-up resistor is enabled. If GPIO0 6 has a pull-up resistor, VS1000 appears as an USB Audio Device. If GPIO0 6 has a pull-down resistor, VS1000 appears as an USB Mass Storage Device. If during power-on the NAND FLASH contained a valid boot sector, the NAND FLASH disk will be used with the mass storage device. The NAND FLASH disk requires a filesystem-level formatting before it can be used. If NFCE had a pull-down instead of pull-up, or if a valid boot sector was not found, a RAM disk is used instead. The RAM disk is preformatted and can be used immediately, but it does not retain its contents between USB detachment and insertion. The RAM disk is only intended for loading software through USB. You can copy a file VS1000 B.RUN to RAM disk and it will be automatically run when you disconnect the USB cable. This mechanism can be used to program the NAND FLASH boot sector (perhaps containing custom boot code), and also for programming a SPI EEPROM in case NAND FLASH is not used in the application.
7.4.2
Default Player Application
When the USB cable is detached, the contents of the disk is checked. If the disk seems to contain a FAT16 or FAT32 filesystem, a cleanup of unused sectors is performed. The cleanup makes the disk perform faster the next time something is written on it. If a full disk has been formatted or emptied, this cleanup can take considerable time, even 30 seconds or more. After the cleanup is finished the player starts to play files. Note: normally Windows formats smaller than about 16 MB disks as FAT12. The player has only partial support for FAT12 disks: no cleanup is performed, subdirectories are not allowed, and files are assumed not to be fragmented. If disks as small as or smaller than this are required, it is possible to format them as FAT16 with the following command. format e: /A:512 /FS:FAT The default player application only decodes Ogg Vorbis files, but it can be extended to allow some simple codecs, like a WAV decoder. In addition to the power button, 5 keys are connected to GPIO0 [4:0] so that they connect a 100 k pull-up to the I/O when the button is pressed, and 1 M pull-downs keep the lines low otherwise. The resistors are needed because these lines are also used for NAND FLASH communication. The keys are read approximately 16 times per second. The key control can be changed by replacing the default key mapping table. The default user interface uses six buttons. Button POWER KEY1 KEY2 KEY3 KEY4 KEY5 Short Press < 1 second Power On, Pause / Play Volume Down Volume Up Previous Next EarSpeaker Long Press >= 1 second Power off (pressed for 2 seconds) Volume Down Volume Up Rewind Fast Forward Random On / Off
Version 1.0,
2007-09-11
17
VLSI
Solution
y
VS1000b
VS1000
7. FIRMWARE OPERATION
Power Button A press of the power button turns on the system. After boot the power LED (the LED connected to SI) is turned on. After the startup a short press of the power button toggles between pause and play modes. In pause mode the power LED flashes. When the power button is pressed for 2 seconds, the system powers down. Volume Buttons Volume can be turned up or down with 0.5 dB steps using the volume buttons. A short press changes the volume by 0.5 dB, a long press will change the volume by approximately 8 dB every second. Previous / Next Buttons A song can be changed using the previous and next buttons. A short press of the previous button will restart the song if it has been played for at least 5 seconds, and go to the previous song otherwise. A short press of the next button goes to the next song. A long press of previous or next will rewind and fast forward the song, respectively. Feature Button The sixth button controls two features: the EarSpeaker spatial processing and the random play function. A long press of the feature button toggles the random play function. When random play becomes activated, a new song is automatically randomly selected. When random play mode is active, the feature LED (the LED connected to SO) will light up. A short press of the feature button will select between four EarSpeaker modes: off, minimal, normal, and extreme.
Version 1.0,
2007-09-11
18
VLSI
Solution
y
VS1000b
VS1000
7. FIRMWARE OPERATION
7.5
7.5.1
Supported Audio Codecs
Supported Ogg Vorbis Formats
Min 1 64 Max 2 4096 48000 500 Unit samples Hz kbit/s
Parameter Channels Window size Sample rate Bit rate
Maximum window size for an Ogg Vorbis file is 8192, however only window sizes upto 4096 are in active use with sample rates not exceeding 48 kHz. With USB (12 MHz clock) sample rates above 46875 Hz are played back at 46875 Hz. There are no sample rate restrictions for lower sample rates: non-standard sample rates can be played back without a performance penalty. Only floor 1 is supported. No known current encoder uses floor 0. All one- and two-channel Ogg Vorbis files within the restrictions above should be playable with this decoder. Ogg Vorbis decoding supports Replay Gain technology. If the decoder finds a Replay Gain tag in the song header, the tag is parsed and the player software uses it to adjust the sound level. For a song without any Replay Gain tag, a default of -6 dB is used. For more details about Replay Gain, see http://en.wikipedia.org/wiki/Replay Gain and http://www.replaygain.org/.
Version 1.0,
2007-09-11
19
VLSI
Solution
y
VS1000b
VS1000
7. FIRMWARE OPERATION
7.6
EarSpeaker Spatial Processing
While listening to headphones the sound has a tendency to be localized inside the head. The sound field becomes flat and lacking a sensation of dimensions. This is an unnatural, awkward and sometimes even disturbing situation. This phenomenon is often referred in literature as `lateralization', meaning 'in-the-head' localization. Long-term listening to lateralized sound may lead to listening fatigue. All real-life sound sources are external, leaving traces of the acoustic wavefront that arrives to the ear drums. From these traces, the auditory system in the brain is able to judge the distance and angle of each sound source. In loudspeaker listening the sound is external and these traces are available. In headphone listening these traces are missing or ambiguous. The EarSpeaker processing makes listening via headphones more like listening to the same music from real loudspeakers or live. Once EarSpeaker processing is activated, the instruments are moved from inside to the outside of the head, making it easier to separate different instruments (see figure 3). The listening experience becomes more natural and pleasant, and the stereo image is sharper as the instruments are widely in front of the listener instead of being inside the head.
Figure 3: EarSpeaker externalized sound sources vs. normal inside-the-head sound
Note that EarSpeaker differs from any common spatial processing effects, such as echo, reverb, or bass boost. EarSpeaker accurately simulates the human auditory model and real listening environment acoustics. Thus it does not change the tonal character of the music by introducing artificial effects. EarSpeaker processing can be parameterized to a few different modes, each simulating a little different type of an acoustical situation and suiting different personal preferences as well as different types of recording. * Off: Best option when listening through loudspeakers or if the audio to be played contains binaural preprocessing * Minimal: Listening to normal musical scores with headphones, very subtle * Normal: Listening to normal musical scores with headphones, moves sound source further than minimal * Extreme: Old or 'dry' recordings, or if the audio to be played is artificial
Version 1.0,
2007-09-11
20
VLSI
Solution
y
VS1000b
VS1000
8. VS1000 ERRATA
8
VS1000 Errata
This chapter describes the known problems with different VS1000 revisions. Most of the problems are correctable with user code that is loaded to IRAM.
VS1000A Errata
* * * * * * * * You can not have initialized Y data with NAND FLASH or Ramdisk boot. EarSpeaker initialization problem with other channel. Analog drivers are enabled too soon, causing a small click in headphones. Intermediate results are saturated in Vorbis windowing with full-scale sine sweep. If Flash does not contain a file system, user interface (including power off) can not be used. Ramdisk boot from VS1000 A.RUN only allows upto 512-byte programs directly. Volume is uninitialized with USB Audio Device if USB is already attached when power is turned on. In most cases Replay Gain fails if other tags are present.
VS1000B Changes
* * * * * * * * * * NAND FLASH and Ramdisk boot can have initialized Y data. EarSpeaker initialization fixed, EarSpeaker optimized from 12 MHz to 10 MHz (at 44.1 kHz). Small power-on click removed. User interface works even if there is no filesystem. (You can turn the power off.) NAND FLASH boot handles larger than 512-byte programs without a chain-loader routine (upto 8176 bytes). Ramdisk boot (VS1000 B.RUN) handles larger than 512-byte programs (upto 8192 bytes). When attached to USB, LED is flashed when there is read/write activity. LED is turned off when the file system has been flushed. Volume is always initialized, USB Audio Device can be powered on while attached to USB (powered from VBUS). USB Suspend + Resume are implemented (but need user tuning). Vorbis: Now uses adaptive accuracy for windowing, implements fast play mode, and has better synchronization after non-fatal errors. Replay gain has been fixed. Player: Fast play mode is used for better-sounding fast forward. Fast forward speeds up when the ff button is kept pressed. Player uses the suspend routine to implement low-power pause mode. Timeout turns the unit off after being 5 minutes in pause mode. The default maximum clock in player mode is 3.5x. Some new IRAM hooks: KeyEventHandler, MassStorage, USBSuspend, InitUSBDescriptors.
*
VS1000C Changes
* Has the same firmware as version B.
VS1000B/C Errata
* NAND FLASH and Ramdisk boot needs one filler word after every Y data record.
Version 1.0,
2007-09-11
21
VLSI
Solution
y
VS1000b
VS1000
9. DOCUMENT VERSION CHANGES
9
Document Version Changes
This chapter describes the most important changes to this document.
Version 1.0 for VS1000B/C, 2007-09-11
* Production version. * Maximum and operational limits updated.
Version 0.4 for VS1000B/C, 2007-09-06
* Release for VS1000B / VS1000C. * Added VS1000 errata: Chapter 8.
Version 0.3, 2007-05-09
* Updated example schematic in Chapter 5.
Version 0.2, 2007-01-25
* Minor changes.
Version 0.1, 2006-11-22
* First pre-release version.
Version 1.0,
2007-09-11
22
VLSI
Solution
y
VS1000b
10 Contact Information
VLSI Solution Oy Entrance G, 2nd floor Hermiankatu 8 FIN-33720 Tampere FINLAND Fax: +358-3-3140-8288 Phone: +358-3-3140-8200 Email: sales@vlsi.fi URL: http://www.vlsi.fi/
VS1000
10. CONTACT INFORMATION
Version 1.0,
2007-09-11
23

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